1. Field of the Invention
The present invention relates generally to a time base corrector, and more specifically to an address generator incorporated in a time base corrector for a video tape recorder. The address generator serves to generate a write address designation signal to a memory unit in response to a reproduced horizontal synchronizing signal including time base fluctuations and also to generate a read address designation signal to the memory unit in response to a reference synchronizing signal having a stable period.
2. Description of the Prior Art
In a video tape recorder, reproduced video signals usually include jitters (time base fluctuations). To eliminate the jitters, a time base corrector having a digital memroy unit is incorporated in the video tape recorder. A reproduced video signal is sequentially written in the memory unit in digital fashion in response to a write clock signal generated on the basis of a burst signal included in the reproduced video signal and then sequentially read from the memory unit in response to a read clock signal generated on the basis of a reference signal having a stable period.
In writing the reproduced video signal in the memory unit, a write address designation signal is outputted from an address generator to the memory unit for designating the first address for each scanning line in response to a reproduced synchronizing signal having time base fluctuations; while in reading the reproduced video signal from the memory unit, a read address designation signal is outputted from the address generator to the memory unit for designating the first address for each scanning line in response to a reference synchronizing signal having a stable period.
On the other hand, in the video tape recorder, the so-called vertical synchronization method is usually adopted for reading video data classified according to each field from the memory unit. To implement the vertical synchronization method, an address at which a reproduced vertical synchronizing signal is written should be latched.
In the prior-art time base corrector, however, there exists a problem in that the video signal stored at the first address of the memory unit is sometimes omitted or dropped off. This is because a data processing time interval is necessary for writing the vertical synchronizing signal in the memory unit and simultaneously for latching the corresponding address in an address counter. In case the above latch processing time exceeds the one horizontal period segment, the read-start address is inevitably shifted to the next one, thus resulting in drop-out of video data stored in the memory unit and therefore resulting in deterioration in reproducing performance of video signals.
The above problem caused in the prior-art time base corrector for a video tape recorder will be described in further detail hereinafter with reference to the attached drawings under DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT.